For all source files update integer types to the new gI8 etc type names

boards/addons/gdisp/board_ED060SC4_example.h

@@ -119,7 +119,7 @@ static GFXINLINE void setpin_sph(GDisplay *g, gBool on) {
 }
 
 /* Set the state of the D0-D7 (source driver Data) pins. */
-static GFXINLINE void setpins_data(GDisplay *g, uint8_t value) {
+static GFXINLINE void setpins_data(GDisplay *g, gU8 value) {
 	(void) g;
 	palWriteGroup(GPIOB, 0xFF, GPIOB_EINK_D0, value);
 }

boards/addons/gdisp/board_HX8347D_stm32f4discovery.h

@@ -112,7 +112,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	}
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	pwmEnableChannel(&PWMD4, 1, percent);
 }
@@ -140,7 +140,7 @@ static GFXINLINE void busmode8(GDisplay *g) {
 	spiStart(&SPID1, &spi1cfg_8bit);
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint8_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU8 index) {
 	(void) g;
     CLR_DATA;
     SPI1->DR = index;
@@ -148,13 +148,13 @@ static GFXINLINE void write_index(GDisplay *g, uint8_t index) {
     SET_DATA;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint8_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU8 data) {
 	(void) g;
     SPI1->DR = data;
     while(((SPI1->SR & SPI_SR_TXE) == 0) || ((SPI1->SR & SPI_SR_BSY) != 0));
 }
 
-static GFXINLINE void write_ram16(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_ram16(GDisplay *g, gU16 data) {
 	(void) g;
     SPI1->DR      = data;
     while((SPI1->SR & SPI_SR_TXE) == 0);

boards/addons/gdisp/board_ILI9320_olimex_pic32mx_lcd.h

@@ -76,7 +76,7 @@ static noinline void setpin_reset(GDisplay *g, gBool state) {
 		palSetPad(IOPORTA, 7);
 }
 
-static void set_backlight(GDisplay *g, uint8_t percent) {
+static void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	if (percentage)
 		palClearPad(IOPORTD, 3);
@@ -92,8 +92,8 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static noinline void write_index(GDisplay *g, uint16_t index) {
-	volatile uint16_t dummy;
+static noinline void write_index(GDisplay *g, gU16 index) {
+	volatile gU16 dummy;
 	(void) g;
 
 	PmpWaitBusy();
@@ -106,7 +106,7 @@ static noinline void write_index(GDisplay *g, uint16_t index) {
 	(void)dummy;
 }
 
-static noinline void write_data(GDisplay *g, uint16_t data) {
+static noinline void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	PMDIN = data;
 	PmpWaitBusy();
@@ -120,7 +120,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 }
 
-static noinline uint16_t read_data(GDisplay *g) {
+static noinline gU16 read_data(GDisplay *g) {
 	(void) g;
 	PmpWaitBusy();
 	return PMDIN;

boards/addons/gdisp/board_ILI9325_hy_stm32_100p.h

@@ -31,8 +31,8 @@
 
 // For a multiple display configuration we would put all this in a structure and then
 //	set g->board to that structure.
-#define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
-#define GDISP_RAM              (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+#define GDISP_REG              (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM              (*((volatile gU16 *) 0x60020000)) /* RS = 1 */
 
 static GFXINLINE void init_board(GDisplay *g) {
 
@@ -76,7 +76,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		palSetPad(GPIOE, GPIOE_TFT_RST);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void)percent;
 }
@@ -89,12 +89,12 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	GDISP_RAM = data;
 }
@@ -107,7 +107,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 	return GDISP_RAM;
 }

boards/addons/gdisp/board_ILI9341_spi.h

@@ -43,7 +43,7 @@ static const SPIConfig spi2cfg = {
   (SPI_CR1_MSTR | SPI_CR1_SPE | SPI_CR1_SSM | SPI_CR1_SSI)
 };
 
-static void send_data(uint16_t data);
+static void send_data(gU16 data);
 
 /**
  * @brief   Initialise the board for the display.
@@ -105,7 +105,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
  * 
  * @notapi
  */
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -139,7 +139,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
  * 
  * @notapi
  */
-static GFXINLINE void send_data(uint16_t data) {
+static GFXINLINE void send_data(gU16 data) {
 // http://forum.easyelectronics.ru/viewtopic.php?p=262122#p262122
   while (!(SPI2->SR & SPI_SR_TXE)); // ïðè âõîäå íà îòïðàâêó ïðîâåðÿåì - à ïóñòîé ëè SPI_DR
   SPI2->DR = data; // çàãðóçèëè â SPI_DR êîä êîìàíäû
@@ -154,7 +154,7 @@ static GFXINLINE void send_data(uint16_t data) {
  *
  * @notapi
  */
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 
   while (SPI2->SR & SPI_SR_BSY);
@@ -177,7 +177,7 @@ static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
  * 
  * @notapi
  */
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 
   send_data(data);
@@ -213,7 +213,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
  *
  * @notapi
  */
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 	return 0;
 }

boards/addons/gdisp/board_ILI9481_firebullstm32f103.h

@@ -58,7 +58,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	(void) state;
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -71,13 +71,13 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	palWritePort(GPIOE, index);
 	CLR_RS; CLR_WR; SET_WR; SET_RS;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	palWritePort(GPIOE, data);
 	CLR_WR; SET_WR;
@@ -95,8 +95,8 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
-	uint16_t	value;
+static GFXINLINE gU16 read_data(GDisplay *g) {
+	gU16	value;
 	(void) g;
 	
 	CLR_RD;

boards/addons/gdisp/board_ILI9488_stm32f4cube_hal.h

@@ -10,8 +10,8 @@
 
 #include "stm32f4xx_hal.h"
 
-#define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
-#define GDISP_RAM              (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+#define GDISP_REG              (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM              (*((volatile gU16 *) 0x60020000)) /* RS = 1 */
 
 static GFXINLINE void init_board(GDisplay *g)
 {
@@ -108,7 +108,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state)
   }
 }
 
-static GFXINLINE void set_backlight(GDisplay* g, uint8_t percent)
+static GFXINLINE void set_backlight(GDisplay* g, gU8 percent)
 {
 	(void) g;
 
@@ -129,14 +129,14 @@ static GFXINLINE void release_bus(GDisplay* g)
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay* g, uint16_t index)
+static GFXINLINE void write_index(GDisplay* g, gU16 index)
 {
 	(void) g;
 
   GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay* g, uint16_t data)
+static GFXINLINE void write_data(GDisplay* g, gU16 data)
 {
 	(void) g;
 
@@ -153,11 +153,11 @@ static GFXINLINE void setwritemode(GDisplay* g)
 	(void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay* g)
+static GFXINLINE gU16 read_data(GDisplay* g)
 {
 	(void) g;
 
-	return (uint16_t)GDISP_RAM;
+	return (gU16)GDISP_RAM;
 }
 
 #endif /* _GDISP_LLD_BOARD_H */

boards/addons/gdisp/board_S6D1121_olimex_e407.h

@@ -18,8 +18,8 @@
 
 // For a multiple display configuration we would put all this in a structure and then
 //	set g->board to that structure.
-#define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
-#define GDISP_RAM              (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+#define GDISP_REG              (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM              (*((volatile gU16 *) 0x60020000)) /* RS = 1 */
 
 static GFXINLINE void init_board(GDisplay *g) {
 
@@ -55,7 +55,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	(void) state;
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -68,12 +68,12 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	GDISP_RAM = data;
 }
@@ -86,7 +86,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 	return GDISP_RAM;
 }

boards/addons/gdisp/board_SPFD54124B_stm32f3.h

@@ -37,7 +37,7 @@
 #if USE_HARD_SPI
 
 #if GFX_USE_OS_CHIBIOS
-static int32_t thdPriority = 0;
+static gI32 thdPriority = 0;
 #endif
 
 /*
@@ -58,9 +58,9 @@ static GFXINLINE void soft_spi_sck(void){
   palClearPad(SPFD54124B_SPI_PORT, SPFD54124B_SPI_SCK);
 }
 
-static GFXINLINE void soft_spi_write_9bit(uint16_t data){
+static GFXINLINE void soft_spi_write_9bit(gU16 data){
 
-  uint8_t i;
+  gU8 i;
 
   // activate lcd by low on CS pin
   palClearPad(SPFD54124B_SPI_PORT, SPFD54124B_SPI_NSS);
@@ -131,7 +131,7 @@ static GFXINLINE void acquire_bus(GDisplay *g) {
   (void) g;
 #if USE_HARD_SPI
 #if GFX_USE_OS_CHIBIOS
-  thdPriority = (int32_t)chThdGetPriority();
+  thdPriority = (gI32)chThdGetPriority();
   chThdSetPriority(HIGHPRIO);
 #endif
   spiAcquireBus(&SPFD54124B_SPID);
@@ -148,10 +148,10 @@ static GFXINLINE void release_bus(GDisplay *g) {
 #endif
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
   (void) g;
 
-  uint16_t b;
+  gU16 b;
 
 #if USE_HARD_SPI
 
@@ -176,7 +176,7 @@ static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
 
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
   (void)    g;
 
 #if USE_HARD_SPI
@@ -195,7 +195,7 @@ static GFXINLINE void post_init_board(GDisplay *g) {
   (void) g;
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
   (void) g;
   (void) percent;
 }

boards/addons/gdisp/board_SSD1289_stm32f4discovery.h

@@ -18,8 +18,8 @@
 
 // For a multiple display configuration we would put all this in a structure and then
 //	set g->board to that structure.
-#define GDISP_REG              ((volatile uint16_t *) 0x60000000)[0] /* RS = 0 */
-#define GDISP_RAM              ((volatile uint16_t *) 0x60020000)[0] /* RS = 1 */
+#define GDISP_REG              ((volatile gU16 *) 0x60000000)[0] /* RS = 0 */
+#define GDISP_RAM              ((volatile gU16 *) 0x60020000)[0] /* RS = 1 */
 #define GDISP_DMA_STREAM		STM32_DMA2_STREAM6
 #define FSMC_BANK				0
 
@@ -114,7 +114,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	(void) state;
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
     pwmEnableChannel(&PWMD3, 2, percent);
 }
@@ -127,12 +127,12 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	GDISP_RAM = data;
 }
@@ -147,7 +147,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	FSMC_Bank1->BTCR[FSMC_BANK+1] = FSMC_BTR1_ADDSET_0 | FSMC_BTR1_DATAST_2 | FSMC_BTR1_BUSTURN_0;		/* FSMC timing */
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 	return GDISP_RAM;
 }

boards/addons/gdisp/board_SSD1306_chibios_16.1.3_stm32f4.h

@@ -72,17 +72,17 @@ static GFXINLINE void release_bus(GDisplay* g)
 	spiReleaseBus(SPI_DRIVER);
 }
 
-static GFXINLINE void write_cmd(GDisplay* g, uint8_t cmd)
+static GFXINLINE void write_cmd(GDisplay* g, gU8 cmd)
 {
 	(void)g;
 
-	static uint8_t buf;
+	static gU8 buf;
 	palClearPad(DC_PORT, DC_PAD);
 	buf = cmd;
 	spiSend(SPI_DRIVER, 1, &buf);
 }
 
-static GFXINLINE void write_data(GDisplay* g, uint8_t* data, uint16_t length)
+static GFXINLINE void write_data(GDisplay* g, gU8* data, gU16 length)
 {
 	(void)g;
 

boards/addons/gdisp/board_SSD1306_i2c.h

@@ -46,7 +46,7 @@
 static I2CConfig i2cconfig;
 
 #if GFX_USE_OS_CHIBIOS
-	static int32_t thdPriority = 0;
+	static gI32 thdPriority = 0;
 #endif
 
 static GFXINLINE void init_board(GDisplay *g) {
@@ -93,7 +93,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 static GFXINLINE void acquire_bus(GDisplay *g) {
 	(void) g;
 	#if GFX_USE_OS_CHIBIOS
-		thdPriority = (int32_t)chThdGetPriority();
+		thdPriority = (gI32)chThdGetPriority();
 		chThdSetPriority(HIGHPRIO);
 	#endif
 	i2cAcquireBus(&I2CD1);
@@ -107,8 +107,8 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	i2cReleaseBus(&I2CD1);
 }
 
-static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
-	uint8_t command[2];
+static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
+	gU8 command[2];
 	(void) g;
 
 	command[0] = 0x00;		// Co = 0, D/C = 0
@@ -119,7 +119,7 @@ static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
 	i2cStop(&I2CD1);
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
+static GFXINLINE void write_data(GDisplay *g, gU8* data, gU16 length) {
 	(void) g;
 
 	i2cStart(&I2CD1, &i2cconfig);

boards/addons/gdisp/board_SSD1963_fsmc.h

@@ -32,8 +32,8 @@ static const LCD_Parameters	DisplayTimings[] = {
 //	set g->board to that structure.
 
 /* Using FSMC A16 as RS */
-#define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
-#define GDISP_RAM              (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+#define GDISP_REG              (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM              (*((volatile gU16 *) 0x60020000)) /* RS = 1 */
 
 static GFXINLINE void init_board(GDisplay *g) {
 
@@ -94,12 +94,12 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	GDISP_RAM = data;
 }

boards/addons/gdisp/board_SSD1963_gpio.h

@@ -87,14 +87,14 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	Clr_CS;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	Set_RS; Clr_RD; Set_WR;
 	palWritePort(GDISP_DATA_PORT, index);
 	Clr_WR;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	Clr_RS; Clr_RD; Set_WR;
 	palWritePort(GDISP_DATA_PORT, data);

boards/addons/gdisp/board_UC8173_nordic_nrf52_sdk11.h

@@ -94,7 +94,7 @@ static GFXINLINE void release_bus(GDisplay* g)
 	nrf_gpio_pin_set(PIN_CS);
 }
 
-static GFXINLINE void write_cmd(GDisplay* g, uint8_t cmd)
+static GFXINLINE void write_cmd(GDisplay* g, gU8 cmd)
 {
 	(void)g;
 
@@ -102,7 +102,7 @@ static GFXINLINE void write_cmd(GDisplay* g, uint8_t cmd)
 	nrf_drv_spi_transfer(&spi, &cmd, 1, 0, 0);
 }
 
-static GFXINLINE void write_data(GDisplay* g, uint8_t data)
+static GFXINLINE void write_data(GDisplay* g, gU8 data)
 {
 	(void)g;
 	
@@ -110,7 +110,7 @@ static GFXINLINE void write_data(GDisplay* g, uint8_t data)
 	nrf_drv_spi_transfer(&spi, &data, 1, 0, 0);
 }
 
-static GFXINLINE void write_data_burst(GDisplay* g, uint8_t* data, uint8_t length)
+static GFXINLINE void write_data_burst(GDisplay* g, gU8* data, gU8 length)
 {
 	(void)g;
 	

boards/addons/ginput/touch/ADS7843/ginput_lld_mouse_board_olimex_stm32_e407.h

@@ -66,14 +66,14 @@ static GFXINLINE void release_bus(GMouse* m) {
     //TOUCHSCREEN_SPI_EPILOGUE();
 }
 
-static GFXINLINE uint16_t read_value(GMouse* m, uint16_t port) {
-    static uint8_t txbuf[3] = {0};
-    static uint8_t rxbuf[3] = {0};
+static GFXINLINE gU16 read_value(GMouse* m, gU16 port) {
+    static gU8 txbuf[3] = {0};
+    static gU8 rxbuf[3] = {0};
 	(void)		m;
 
     txbuf[0] = port;
     spiExchange(&SPID2, 3, txbuf, rxbuf);
-    return ((uint16_t)rxbuf[1] << 5) | (rxbuf[2] >> 3);
+    return ((gU16)rxbuf[1] << 5) | (rxbuf[2] >> 3);
 }
 
 #endif /* _GINPUT_LLD_MOUSE_BOARD_H */

boards/addons/ginput/touch/ADS7843/ginput_lld_mouse_board_st_stm32f4_discovery.h

@@ -80,15 +80,15 @@ static GFXINLINE void release_bus(GMouse* m) {
 	spiReleaseBus(&SPID2);
 }
 
-static GFXINLINE uint16_t read_value(GMouse* m, uint16_t port) {
-	static uint8_t txbuf[3] = {0};
-	static uint8_t rxbuf[3] = {0};
+static GFXINLINE gU16 read_value(GMouse* m, gU16 port) {
+	static gU8 txbuf[3] = {0};
+	static gU8 rxbuf[3] = {0};
 	(void)		m;
 
 	txbuf[0] = port;
 	spiExchange(&SPID2, 3, txbuf, rxbuf);
 
-	return ((uint16_t)rxbuf[1] << 5) | (rxbuf[2] >> 3);
+	return ((gU16)rxbuf[1] << 5) | (rxbuf[2] >> 3);
 }
 
 #endif /* _GINPUT_LLD_MOUSE_BOARD_H */

boards/addons/ginput/touch/ADS7843/stm32f4cube_hal.h

@@ -123,11 +123,11 @@ static GFXINLINE void release_bus(GMouse* m)
   HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET);
 }
 
-static GFXINLINE uint16_t read_value(GMouse* m, uint16_t reg)
+static GFXINLINE gU16 read_value(GMouse* m, gU16 reg)
 {
-  uint8_t txbuf[3] = {0, 0, 0};
-  uint8_t rxbuf[3] = {0, 0, 0};
-  uint16_t ret;
+  gU8 txbuf[3] = {0, 0, 0};
+  gU8 rxbuf[3] = {0, 0, 0};
+  gU16 ret;
 
   (void)m;
 

boards/base/Altera-MAX10-Neek/board_alteraframereader.h

@@ -10,13 +10,13 @@
 #define FRAMEREADER_BASE        ALT_VIP_VFR_0_BASE
 
 #if GDISP_NEED_CONTROL
-	static void board_backlight(GDisplay* g, uint8_t percent)
+	static void board_backlight(GDisplay* g, gU8 percent)
 	{
 		(void) g;
 		(void) percent;
 	}
 
-	static void board_contrast(GDisplay* g, uint8_t percent)
+	static void board_contrast(GDisplay* g, gU8 percent)
 	{
 		(void) g;
 		(void) percent;

boards/base/Altera-MAX10-Neek/gmouse_lld_FT5316_board.h

@@ -76,29 +76,29 @@ static gBool init_board(GMouse* m, unsigned instance)
 	return gTrue;
 }
 
-static void write_reg(GMouse* m, uint8_t reg, uint8_t val)
+static void write_reg(GMouse* m, gU8 reg, gU8 val)
 {
 	(void)m;
 
 	device_write(FT5316_I2C_SLAVE_ADDRESS, reg, val);
 }
 
-static uint8_t read_byte(GMouse* m, uint8_t reg)
+static gU8 read_byte(GMouse* m, gU8 reg)
 {
 	(void)m;
-	uint8_t ret = 0;
+	gU8 ret = 0;
 
-	ret = (uint8_t)device_read(FT5316_I2C_SLAVE_ADDRESS, reg);
+	ret = (gU8)device_read(FT5316_I2C_SLAVE_ADDRESS, reg);
 
 	return ret;
 }
 
-static uint16_t read_word(GMouse* m, uint8_t reg)
+static gU16 read_word(GMouse* m, gU8 reg)
 {
 	(void)m;
-	uint16_t ret = 0;
+	gU16 ret = 0;
 
-	ret = (uint16_t)device_read(FT5316_I2C_SLAVE_ADDRESS, reg);
+	ret = (gU16)device_read(FT5316_I2C_SLAVE_ADDRESS, reg);
 
 	return ret;
 }

boards/base/ArduinoTinyScreen/gfx/board_SSD1331.cpp

@@ -26,9 +26,9 @@
 // Wire address of the SX1505 chip
 #define GPIO_ADDR			0x20
 
-static void writeGPIO(uint8_t regAddr, uint8_t regData)
+static void writeGPIO(gU8 regAddr, gU8 regData)
 {
-  uint8_t oldTWBR=TWBR;
+  gU8 oldTWBR=TWBR;
   TWBR=0;
   Wire.beginTransmission(GPIO_ADDR + LCD_BOARD_ID);
   Wire.write(regAddr); 
@@ -69,7 +69,7 @@ void SSD1331_releasebus(void) {
 	isDataMode = isCmdMode = false;
 }
 
-void SSD1331_write_cmd(uint8_t cmd) {
+void SSD1331_write_cmd(gU8 cmd) {
 	if (!isCmdMode) {
 		writeGPIO(GPIO_RegData,GPIO_CMD_START);
 		isDataMode = false;
@@ -78,7 +78,7 @@ void SSD1331_write_cmd(uint8_t cmd) {
 	SPI.transfer(cmd);
 }
 
-void SSD1331_write_data(uint8_t data) {
+void SSD1331_write_data(gU8 data) {
 	if (!isDataMode) {
 		writeGPIO(GPIO_RegData,GPIO_DATA_START);
 		isDataMode = true;

boards/base/ArduinoTinyScreen/gfx/board_SSD1331.h

@@ -25,8 +25,8 @@ void SSD1331_init_board(void);
 void SSD1331_setpin_reset(int state);
 void SSD1331_aquirebus(void);
 void SSD1331_releasebus(void);
-void SSD1331_write_cmd(uint8_t cmd);
-void SSD1331_write_data(uint8_t data);
+void SSD1331_write_cmd(gU8 cmd);
+void SSD1331_write_data(gU8 data);
 
 #ifdef __cplusplus
 }

boards/base/Embest-STM32-DMSTF4BB/board_SSD2119.h

@@ -12,8 +12,8 @@
 //	set g->board to that structure.
 
 /* Using FSMC A19 (PE3) as DC */
-#define GDISP_REG (*((volatile uint16_t *) 0x60000000)) /* DC = 0 */
-#define GDISP_RAM (*((volatile uint16_t *) 0x60100000)) /* DC = 1 */
+#define GDISP_REG (*((volatile gU16 *) 0x60000000)) /* DC = 0 */
+#define GDISP_RAM (*((volatile gU16 *) 0x60100000)) /* DC = 1 */
 #define GDISP_DMA_STREAM STM32_DMA2_STREAM6
 
 #define SET_RST palSetPad(GPIOD, 3);
@@ -108,7 +108,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	}
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	pwmEnableChannel(&PWMD4, 1, percent);
 }
@@ -121,12 +121,12 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	GDISP_RAM = data;
 }
@@ -139,7 +139,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 	return GDISP_RAM;
 }

boards/base/Embest-STM32-DMSTF4BB/gmouse_lld_STMPE811_board.h

@@ -77,8 +77,8 @@ static GFXINLINE void release_bus(GMouse* m) {
 
 }
 
-static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
-	uint8_t		txbuf[2];
+static void write_reg(GMouse* m, gU8 reg, gU8 val) {
+	gU8		txbuf[2];
 	(void)		m;
 
 	txbuf[0] = reg;
@@ -89,8 +89,8 @@ static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
 	i2cReleaseBus(&I2CD1);
 }
 
-static uint8_t read_byte(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[1];
+static gU8 read_byte(GMouse* m, gU8 reg) {
+	gU8		rxbuf[1];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -102,8 +102,8 @@ static uint8_t read_byte(GMouse* m, uint8_t reg) {
 	return rxbuf[0];
 }
 
-static uint16_t read_word(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[2];
+static gU16 read_word(GMouse* m, gU8 reg) {
+	gU8		rxbuf[2];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -113,7 +113,7 @@ static uint16_t read_word(GMouse* m, uint8_t reg) {
 	i2cMasterTransmitTimeout(&I2CD1, STMPE811_ADDR, &reg, 1, rxbuf, 2, MS2ST(STMPE811_TIMEOUT));
 	i2cReleaseBus(&I2CD1);
 
-	return (((uint16_t)rxbuf[0]) << 8) | rxbuf[1];
+	return (((gU16)rxbuf[0]) << 8) | rxbuf[1];
 }
 
 #endif /* _GINPUT_LLD_MOUSE_BOARD_H */

boards/base/FireBull-STM32F103-FB/board_SSD1289.h

@@ -56,7 +56,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state)
 	/* Nothing to do here - reset pin tied to Vcc */
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent)
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent)
 {
 	(void) g;
 	(void) percent;
@@ -74,7 +74,7 @@ static GFXINLINE void release_bus(GDisplay *g)
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index)
+static GFXINLINE void write_index(GDisplay *g, gU16 index)
 {
 	(void) g;
 
@@ -85,7 +85,7 @@ static GFXINLINE void write_index(GDisplay *g, uint16_t index)
 	SET_RS;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data)
+static GFXINLINE void write_data(GDisplay *g, gU16 data)
 {
 	(void) g;
 
@@ -112,7 +112,7 @@ static GFXINLINE void setwritemode(GDisplay *g)
 	palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 
 	return palReadPort(GPIOE);

boards/base/FireBull-STM32F103-FB/gmouse_lld_ADS7843_board.h

@@ -66,11 +66,11 @@ static GFXINLINE void release_bus(GMouse* m)
 	spiReleaseBus(&SPID1);
 }
 
-static GFXINLINE uint16_t read_value(GMouse* m, uint16_t port)
+static GFXINLINE gU16 read_value(GMouse* m, gU16 port)
 {
-    static uint8_t txbuf[3] = {0};
-    static uint8_t rxbuf[3] = {0};
-    uint16_t ret;
+    static gU8 txbuf[3] = {0};
+    static gU8 rxbuf[3] = {0};
+    gU16 ret;
 	(void)	m;
 
     txbuf[0] = port;

boards/base/HY-MiniSTM32V/board_SSD1289.h

@@ -40,8 +40,8 @@ static const PWMConfig pwmcfg =
 /*
  * LCD_RS is on A16 (PD11)
  */
-#define GDISP_REG   (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
-#define GDISP_RAM   (*((volatile uint16_t *) 0x60020000)) /* RS = 1 */
+#define GDISP_REG   (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM   (*((volatile gU16 *) 0x60020000)) /* RS = 1 */
 /*
  * STM32_DMA1_STREAM7
  * NOTE: conflicts w/ USART2_TX, TIM2_CH2, TIM2_CH4, TIM4_UP, I2C1_RX in case
@@ -131,7 +131,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
   else {}
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
   (void) g;
   if (percent > 100) { percent = 100; }
   pwmEnableChannel(&PWMD3, 1, percent);
@@ -145,12 +145,12 @@ static GFXINLINE void release_bus(GDisplay *g) {
   (void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
   (void) g;
   GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
   (void) g;
   GDISP_RAM = data;
 }
@@ -163,7 +163,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
   (void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
   (void) g;
   return GDISP_RAM;
 }

boards/base/HY-MiniSTM32V/gmouse_lld_ADS7843_board.h

@@ -83,11 +83,11 @@ static GFXINLINE void release_bus(GMouse* m) {
   spiReleaseBus(&SPID1);
 }
 
-static GFXINLINE uint16_t read_value(GMouse* m, uint16_t port) {
+static GFXINLINE gU16 read_value(GMouse* m, gU16 port) {
   (void)m;
-  static uint8_t txbuf[3] = {0};
-  static uint8_t rxbuf[3] = {0};
-  uint16_t ret;
+  static gU8 txbuf[3] = {0};
+  static gU8 rxbuf[3] = {0};
+  gU16 ret;
 
   txbuf[0] = port;
   spiExchange(&SPID1, 3, txbuf, rxbuf);

boards/base/Linux-Framebuffer/board_framebuffer.h

@@ -203,12 +203,12 @@
 	#endif
 
 	#if GDISP_NEED_CONTROL
-		static void board_backlight(GDisplay *g, uint8_t percent) {
+		static void board_backlight(GDisplay *g, gU8 percent) {
 			(void) g;
 			(void) percent;
 		}
 
-		static void board_contrast(GDisplay *g, uint8_t percent) {
+		static void board_contrast(GDisplay *g, gU8 percent) {
 			(void) g;
 			(void) percent;
 		}

boards/base/Marlin/board_RA8875.h

@@ -15,8 +15,8 @@
 
 // For a multiple display configuration we would put all this in a structure and then
 // set g->board to that structure.
-#define GDISP_RAM              (*((volatile uint16_t *) 0x68000000)) /* RS = 0 */
-#define GDISP_REG              (*((volatile uint16_t *) 0x68020000)) /* RS = 1 */
+#define GDISP_RAM              (*((volatile gU16 *) 0x68000000)) /* RS = 0 */
+#define GDISP_REG              (*((volatile gU16 *) 0x68020000)) /* RS = 1 */
 #define FSMC_BANK				4
 
 
@@ -83,13 +83,13 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 
 	GDISP_RAM = data;
@@ -103,7 +103,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 
 	return GDISP_RAM;

boards/base/Marlin/gmouse_lld_FT5x06_board.h

@@ -51,8 +51,8 @@ static GFXINLINE void release_bus(GMouse* m) {
 
 }
 
-static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
-	uint8_t txbuf[2];
+static void write_reg(GMouse* m, gU8 reg, gU8 val) {
+	gU8 txbuf[2];
 	(void)		m;
 
 	txbuf[0] = reg;
@@ -63,8 +63,8 @@ static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
 	i2cReleaseBus(&I2CD2);
 }
 
-static uint8_t read_byte(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[1];
+static gU8 read_byte(GMouse* m, gU8 reg) {
+	gU8		rxbuf[1];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -76,8 +76,8 @@ static uint8_t read_byte(GMouse* m, uint8_t reg) {
 	return rxbuf[0];
 }
 
-static uint16_t read_word(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[2];
+static gU16 read_word(GMouse* m, gU8 reg) {
+	gU8		rxbuf[2];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -87,7 +87,7 @@ static uint16_t read_word(GMouse* m, uint8_t reg) {
 	i2cMasterTransmitTimeout(&I2CD2, FT5x06_ADDR, &reg, 1, rxbuf, 2, MS2ST(FT5x06_TIMEOUT));
 	i2cReleaseBus(&I2CD2);
 
-	return (((uint16_t)rxbuf[0]) << 8) | rxbuf[1];
+	return (((gU16)rxbuf[0]) << 8) | rxbuf[1];
 }
 
 #endif /* _GINPUT_LLD_MOUSE_BOARD_H */

boards/base/Mikromedia-Plus-STM32-M4/ChibiOS_Board/flash_memory.c

@@ -19,10 +19,10 @@ static const SPIConfig flash_spicfg = {
 };
 
 bool flash_is_write_busy(void) {
-  static uint8_t is_write_busy_cmd[1];
+  static gU8 is_write_busy_cmd[1];
   is_write_busy_cmd[0] = _SERIAL_FLASH_CMD_RDSR;
   
-  uint8_t result[1];
+  gU8 result[1];
 
   spiAcquireBus(&SPID3);
   spiStart(&SPID3, &flash_spicfg);
@@ -44,9 +44,9 @@ void flash_write_enable(void) {
   spiReleaseBus(&SPID3);
 }
 
-void flash_sector_erase(uint32_t sector) {
+void flash_sector_erase(gU32 sector) {
   flash_write_enable();
-  static uint8_t sector_erase_cmd[4];
+  static gU8 sector_erase_cmd[4];
   sector_erase_cmd[0] = _SERIAL_FLASH_CMD_SER;
   sector_erase_cmd[1] = (sector >> 16) & 0xFF;
   sector_erase_cmd[2] = (sector >> 8) & 0xFF;
@@ -64,8 +64,8 @@ void flash_sector_erase(uint32_t sector) {
   while(flash_is_write_busy());
 }
 
-void flash_read(uint32_t address, size_t bytes, uint8_t *out) {
-  static uint8_t sector_read_cmd[4];
+void flash_read(gU32 address, gMemSize bytes, gU8 *out) {
+  static gU8 sector_read_cmd[4];
   sector_read_cmd[0] = _SERIAL_FLASH_CMD_READ;
   sector_read_cmd[1] = (address >> 16) & 0xFF;
   sector_read_cmd[2] = (address >> 8) & 0xFF;
@@ -80,8 +80,8 @@ void flash_read(uint32_t address, size_t bytes, uint8_t *out) {
   spiReleaseBus(&SPID3);
 }
 
-void flash_write(uint32_t address, size_t bytes, const uint8_t *data) {
-  static uint8_t flash_write_cmd[4];
+void flash_write(gU32 address, gMemSize bytes, const gU8 *data) {
+  static gU8 flash_write_cmd[4];
 
   flash_write_enable();
 
@@ -103,21 +103,21 @@ void flash_write(uint32_t address, size_t bytes, const uint8_t *data) {
 }
 
 bool flash_tp_calibrated(void) {
-  uint8_t out[1];
+  gU8 out[1];
   flash_read(0x0F0000, 1, out);
 
   return (out[0] == 0x01);
 }
 
-void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz) {
+void flash_tp_calibration_save(gU16 instance, const gU8 *calbuf, gMemSize sz) {
   if (instance) return;
   flash_sector_erase(0x0F0000);
-  uint8_t calibrated = 0x01;
+  gU8 calibrated = 0x01;
   flash_write(0x0F0000, 1, &calibrated);
   flash_write(0x0F0001, sz, calbuf);
 }
-const char *flash_tp_calibration_load(uint16_t instance) {
-  static uint8_t foo[24];
+const char *flash_tp_calibration_load(gU16 instance) {
+  static gU8 foo[24];
 
   if (instance) return 0;
   if (!flash_tp_calibrated()) return 0;

boards/base/Mikromedia-Plus-STM32-M4/ChibiOS_Board/flash_memory.h

@@ -1,6 +1,6 @@
-void flash_sector_erase(uint32_t sector);
-void flash_read(uint32_t address, size_t bytes, uint8_t *out);
-void flash_write(uint32_t address, size_t bytes, const uint8_t *data);
+void flash_sector_erase(gU32 sector);
+void flash_read(gU32 address, gMemSize bytes, gU8 *out);
+void flash_write(gU32 address, gMemSize bytes, const gU8 *data);
 bool flash_tp_calibrated(void);
-void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz);
-const char *flash_tp_calibration_load(uint16_t instance);
+void flash_tp_calibration_save(gU16 instance, const gU8 *calbuf, gMemSize sz);
+const char *flash_tp_calibration_load(gU16 instance);

boards/base/Mikromedia-Plus-STM32-M4/board_SSD1963.h

@@ -87,7 +87,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	SET_CS;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 
 	CLR_DC;
@@ -97,7 +97,7 @@ static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
 	SET_DC;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 
 	palWriteBus(&busDataLo, (data & 0xFF));
@@ -117,8 +117,8 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	palSetBusMode(&busDataHi, PAL_MODE_OUTPUT_PUSHPULL);
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
-	uint16_t data;
+static GFXINLINE gU16 read_data(GDisplay *g) {
+	gU16 data;
 	(void) g;
 
 	CLR_RD;

boards/base/Mikromedia-Plus-STM32-M4/gmouse_lld_STMPE610_board.h

@@ -77,8 +77,8 @@ static GFXINLINE void release_bus(GMouse* m) {
 
 }
 
-static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
-	uint8_t		txbuf[2];
+static void write_reg(GMouse* m, gU8 reg, gU8 val) {
+	gU8		txbuf[2];
 	(void)		m;
 
 	txbuf[0] = reg;
@@ -89,8 +89,8 @@ static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
 	i2cReleaseBus(&I2CD1);
 }
 
-static uint8_t read_byte(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[1];
+static gU8 read_byte(GMouse* m, gU8 reg) {
+	gU8		rxbuf[1];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -102,8 +102,8 @@ static uint8_t read_byte(GMouse* m, uint8_t reg) {
 	return rxbuf[0];
 }
 
-static uint16_t read_word(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[2];
+static gU16 read_word(GMouse* m, gU8 reg) {
+	gU8		rxbuf[2];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -113,7 +113,7 @@ static uint16_t read_word(GMouse* m, uint8_t reg) {
 	i2cMasterTransmitTimeout(&I2CD1, STMPE610_ADDR, &reg, 1, rxbuf, 2, MS2ST(STMPE610_TIMEOUT));
 	i2cReleaseBus(&I2CD1);
 
-	return (((uint16_t)rxbuf[0]) << 8) | rxbuf[1];
+	return (((gU16)rxbuf[0]) << 8) | rxbuf[1];
 }
 
 #endif /* _GINPUT_LLD_MOUSE_BOARD_H */

boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.c

@@ -19,10 +19,10 @@ static const SPIConfig flash_spicfg = {
 };
 
 bool flash_is_write_busy(void) {
-  static uint8_t is_write_busy_cmd[1];
+  static gU8 is_write_busy_cmd[1];
   is_write_busy_cmd[0] = _SERIAL_FLASH_CMD_RDSR;
   
-  uint8_t result[1];
+  gU8 result[1];
 
   spiAcquireBus(&SPID3);
   spiStart(&SPID3, &flash_spicfg);
@@ -44,9 +44,9 @@ void flash_write_enable(void) {
   spiReleaseBus(&SPID3);
 }
 
-void flash_sector_erase(uint32_t sector) {
+void flash_sector_erase(gU32 sector) {
   flash_write_enable();
-  static uint8_t sector_erase_cmd[4];
+  static gU8 sector_erase_cmd[4];
   sector_erase_cmd[0] = _SERIAL_FLASH_CMD_SER;
   sector_erase_cmd[1] = (sector >> 16) & 0xFF;
   sector_erase_cmd[2] = (sector >> 8) & 0xFF;
@@ -64,8 +64,8 @@ void flash_sector_erase(uint32_t sector) {
   while(flash_is_write_busy());
 }
 
-void flash_read(uint32_t address, size_t bytes, uint8_t *out) {
-  static uint8_t sector_read_cmd[4];
+void flash_read(gU32 address, gMemSize bytes, gU8 *out) {
+  static gU8 sector_read_cmd[4];
   sector_read_cmd[0] = _SERIAL_FLASH_CMD_READ;
   sector_read_cmd[1] = (address >> 16) & 0xFF;
   sector_read_cmd[2] = (address >> 8) & 0xFF;
@@ -80,8 +80,8 @@ void flash_read(uint32_t address, size_t bytes, uint8_t *out) {
   spiReleaseBus(&SPID3);
 }
 
-void flash_write(uint32_t address, size_t bytes, const uint8_t *data) {
-  static uint8_t flash_write_cmd[4];
+void flash_write(gU32 address, gMemSize bytes, const gU8 *data) {
+  static gU8 flash_write_cmd[4];
 
   flash_write_enable();
 
@@ -103,21 +103,21 @@ void flash_write(uint32_t address, size_t bytes, const uint8_t *data) {
 }
 
 bool flash_tp_calibrated(void) {
-  uint8_t out[1];
+  gU8 out[1];
   flash_read(0x0F0000, 1, out);
 
   return (out[0] == 0x01);
 }
 
-void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz) {
+void flash_tp_calibration_save(gU16 instance, const gU8 *calbuf, gMemSize sz) {
   if (instance) return;
   flash_sector_erase(0x0F0000);
-  uint8_t calibrated = 0x01;
+  gU8 calibrated = 0x01;
   flash_write(0x0F0000, 1, &calibrated);
   flash_write(0x0F0001, sz, calbuf);
 }
-const char *flash_tp_calibration_load(uint16_t instance) {
-  static uint8_t foo[24];
+const char *flash_tp_calibration_load(gU16 instance) {
+  static gU8 foo[24];
 
   if (instance) return 0;
   if (!flash_tp_calibrated()) return 0;

boards/base/Mikromedia-STM32-M4-ILI9341/ChibiOS_Board/flash_memory.h

@@ -1,6 +1,6 @@
-void flash_sector_erase(uint32_t sector);
-void flash_read(uint32_t address, size_t bytes, uint8_t *out);
-void flash_write(uint32_t address, size_t bytes, const uint8_t *data);
+void flash_sector_erase(gU32 sector);
+void flash_read(gU32 address, gMemSize bytes, gU8 *out);
+void flash_write(gU32 address, gMemSize bytes, const gU8 *data);
 bool flash_tp_calibrated(void);
-void flash_tp_calibration_save(uint16_t instance, const uint8_t *calbuf, size_t sz);
-const char *flash_tp_calibration_load(uint16_t instance);
+void flash_tp_calibration_save(gU16 instance, const gU8 *calbuf, gMemSize sz);
+const char *flash_tp_calibration_load(gU16 instance);

boards/base/Mikromedia-STM32-M4-ILI9341/board_ILI9341.h

@@ -49,7 +49,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	}
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	// TODO: can probably pwm this
 	if(percent) {
@@ -76,19 +76,19 @@ static GFXINLINE void release_bus(GDisplay *g) {
  *
  * @notapi
  */
-static GFXINLINE void ili9341_delay(uint16_t dly) {
-  static uint16_t i;
+static GFXINLINE void ili9341_delay(gU16 dly) {
+  static gU16 i;
   for(i = 0; i < dly; i++)
     asm("nop");
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	palWriteGroup(GPIOE, 0x00FF, 0, index);
 	CLR_RS; CLR_WR; ili9341_delay(1); SET_WR; ili9341_delay(1); SET_RS;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	palWriteGroup(GPIOE, 0x00FF, 0, data);
 	CLR_WR; ili9341_delay(1); SET_WR; ili9341_delay(1);
@@ -106,8 +106,8 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	palSetGroupMode(GPIOE, PAL_WHOLE_PORT, 0, PAL_MODE_OUTPUT_PUSHPULL);
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
-	uint16_t	value;
+static GFXINLINE gU16 read_data(GDisplay *g) {
+	gU16	value;
 	(void) g;
 	CLR_RD;
 	value = palReadPort(GPIOE);

boards/base/Olimex-SAM7EX256-GE12/board_Nokia6610GE12.h

@@ -141,7 +141,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		palSetPad(IOPORT1, PIOA_LCD_RESET);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	if (percent == 100) {
 		/* Turn the pin on - No PWM */
@@ -175,7 +175,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	// wait for the previous transfer to complete
 	while(!(pSPI->SPI_SR & AT91C_SPI_TDRE));
@@ -183,7 +183,7 @@ static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
 	pSPI->SPI_TDR = index & 0xFF;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	// wait for the previous transfer to complete
 	while(!(pSPI->SPI_SR & AT91C_SPI_TDRE));

boards/base/Olimex-SAM7EX256-GE8/board_Nokia6610GE8.h

@@ -139,7 +139,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		palSetPad(IOPORT1, PIOA_LCD_RESET);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	if (percent == 100) {
 		/* Turn the pin on - No PWM */
@@ -173,7 +173,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 	// wait for the previous transfer to start
 	while(!(pSPI->SPI_SR & AT91C_SPI_TDRE));
@@ -181,7 +181,7 @@ static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
 	pSPI->SPI_TDR = index & 0xFF;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 	// wait for the previous transfer to start
 	while(!(pSPI->SPI_SR & AT91C_SPI_TDRE));

boards/base/Olimex-SAM7EX256-GE8/board_SSD1306_i2c.h

@@ -81,7 +81,7 @@
 
 	#define I2C_WAITCOMPLETE()
 	#define I2C_WRITECMDBYTE(cmd)			{						\
-		uint8_t	data[2];											\
+		gU8	data[2];											\
 		data[0] = 0;												\
 		data[1] = cmd;												\
 		i2cMasterTransmitTimeout (UEXT_I2C, I2C_ADDRESS, data, 2, 0, 0, gDelayForever);	\
@@ -107,7 +107,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 	(void) state;
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -125,7 +125,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	I2C_RELEASEBUS();
 }
 
-static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
+static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
 	(void) g;
 
 	I2C_WAITCOMPLETE();
@@ -134,7 +134,7 @@ static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
 	I2C_WRITECMDBYTE(cmd);
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
+static GFXINLINE void write_data(GDisplay *g, gU8* data, gU16 length) {
 	(void) g;
 
 	I2C_WAITCOMPLETE();

boards/base/Olimex-SAM7EX256-GE8/board_SSD1306_spi.h

@@ -63,8 +63,8 @@
 
 	static void spi_delay(volatile unsigned long a) { while (a!=0) a--; }
 
-	static void spi_write(uint8_t data) {
-		uint8_t bit;
+	static void spi_write(gU8 data) {
+		gU8 bit;
 
 		for(bit = 0x80; bit; bit >>= 1) {
 			if(data & bit)
@@ -185,7 +185,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		PinSet(PORT_RESET, PIN_RESET);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -203,7 +203,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	SPI_RELEASEBUS();
 }
 
-static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
+static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
 	(void) g;
 
 	// Command mode please
@@ -213,7 +213,7 @@ static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
 	SPI_WRITEBYTE(cmd);
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
+static GFXINLINE void write_data(GDisplay *g, gU8* data, gU16 length) {
 	(void) g;
 
 	// Data mode please

boards/base/Olimex-SAM7EX256-GE8/board_SSD1331.h

@@ -63,8 +63,8 @@
 
 	static void spi_delay(volatile unsigned long a) { while (a!=0) a--; }
 
-	static void spi_write(uint8_t data) {
-		uint8_t bit;
+	static void spi_write(gU8 data) {
+		gU8 bit;
 
 		for(bit = 0x80; bit; bit >>= 1) {
 			if(data & bit)
@@ -182,7 +182,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		PinSet(PORT_RESET, PIN_RESET);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -200,7 +200,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	SPI_RELEASEBUS();
 }
 
-static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
+static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
 	(void) g;
 
 	// Command mode please
@@ -210,7 +210,7 @@ static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
 	SPI_WRITEBYTE(cmd);
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint8_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU8 data) {
 	(void) g;
 
 	// Data mode please

boards/base/Olimex-SAM7EX256-GE8/board_TLS8204.h

@@ -49,8 +49,8 @@
 
 	static void spi_delay(volatile unsigned long a) { while (a!=0) a--; }
 
-	static void spi_write(uint8_t data) {
-		uint8_t bit;
+	static void spi_write(gU8 data) {
+		gU8 bit;
 
 		for(bit = 0x80; bit; bit >>= 1) {
 			if(data & bit)
@@ -171,7 +171,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		PinSet(PORT_RESET, PIN_RESET);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }
@@ -189,7 +189,7 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	SPI_RELEASEBUS();
 }
 
-static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
+static GFXINLINE void write_cmd(GDisplay *g, gU8 cmd) {
 	(void) g;
 
 	// Command mode please
@@ -199,7 +199,7 @@ static GFXINLINE void write_cmd(GDisplay *g, uint8_t cmd) {
 	SPI_WRITEBYTE(cmd);
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint8_t* data, uint16_t length) {
+static GFXINLINE void write_data(GDisplay *g, gU8* data, gU16 length) {
 	(void) g;
 
 	// Data mode please

boards/base/Olimex-SAM7EX256-GE8/gaudio_play_board.h

@@ -33,9 +33,9 @@ static GPTConfig gptcfg = {
   GPT_TRIGGER_NONE,				// trigger
 };
 
-static uint16_t		lastvalue;
+static gU16		lastvalue;
 
-static gBool gaudio_play_pwm_setup(uint32_t frequency, ArrayDataFormat format) {
+static gBool gaudio_play_pwm_setup(gU32 frequency, ArrayDataFormat format) {
 	if (format == ARRAY_DATA_10BITUNSIGNED)
 		pwmcfg.period = 1024;
 	else if (format == ARRAY_DATA_8BITUNSIGNED)
@@ -65,7 +65,7 @@ static void gaudio_play_pwm_stop(void) {
 	pwmStop(&PWMD1);
 }
 
-static void gaudio_play_pwm_setI(uint16_t value) {
+static void gaudio_play_pwm_setI(gU16 value) {
 	if (value != lastvalue) {
 		lastvalue = value;
 		pwmEnableChannelI(&PWMD1, 0, value);

boards/base/Olimex-SAM7EX256-GE8/gaudio_record_board.h

@@ -30,7 +30,7 @@
 #define	GAUDIO_RECORD_MICROPHONE					0
 
 #ifdef GAUDIO_RECORD_IMPLEMENTATION
-	static uint32_t gaudio_gadc_physdevs[GAUDIO_RECORD_NUM_CHANNELS] = {
+	static gU32 gaudio_gadc_physdevs[GAUDIO_RECORD_NUM_CHANNELS] = {
 			GADC_PHYSDEV_MICROPHONE,
 			};
 #endif

boards/base/Olimex-STM32-LCD/board_ILI9320.h

@@ -10,8 +10,8 @@
 
 // For a multiple display configuration we would put all this in a structure and then
 //	set g->board to that structure.
-#define GDISP_REG              (*((volatile uint16_t *) 0x60000000)) /* RS = 0 */
-#define GDISP_RAM              (*((volatile uint16_t *) 0x60100000)) /* RS = 1 */
+#define GDISP_REG              (*((volatile gU16 *) 0x60000000)) /* RS = 0 */
+#define GDISP_RAM              (*((volatile gU16 *) 0x60100000)) /* RS = 1 */
 
 static GFXINLINE void init_board(GDisplay *g) {
 
@@ -54,7 +54,7 @@ static GFXINLINE void setpin_reset(GDisplay *g, gBool state) {
 		palSetPad(GPIOE, GPIOE_TFT_RST);
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 
 	if(percent)
@@ -71,13 +71,13 @@ static GFXINLINE void release_bus(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void write_index(GDisplay *g, uint16_t index) {
+static GFXINLINE void write_index(GDisplay *g, gU16 index) {
 	(void) g;
 
 	GDISP_REG = index;
 }
 
-static GFXINLINE void write_data(GDisplay *g, uint16_t data) {
+static GFXINLINE void write_data(GDisplay *g, gU16 data) {
 	(void) g;
 
 	GDISP_RAM = data;
@@ -91,7 +91,7 @@ static GFXINLINE void setwritemode(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE uint16_t read_data(GDisplay *g) {
+static GFXINLINE gU16 read_data(GDisplay *g) {
 	(void) g;
 
 	return GDISP_RAM;

boards/base/Olimex-STM32-LCD/gmouse_lld_MCU_board.h

@@ -75,7 +75,7 @@ static gBool init_board(GMouse *m, unsigned driverinstance) {
 
 static gBool read_xyz(GMouse *m, GMouseReading *prd) {
 	adcsample_t samples[ADC_NUM_CHANNELS * ADC_BUF_DEPTH];
-	uint16_t val1, val2;
+	gU16 val1, val2;
 	(void)		m;
 
 	// No buttons and assume touch off

boards/base/RaspberryPi/FreeRTOS/mmio.h

@@ -6,16 +6,16 @@
 #include <stdint.h>
  
 // write to MMIO register
-static GFXINLINE void mmio_write(uint32_t reg, uint32_t data) {
-    uint32_t *ptr = (uint32_t*)reg;
+static GFXINLINE void mmio_write(gU32 reg, gU32 data) {
+    gU32 *ptr = (gU32*)reg;
     asm volatile("str %[data], [%[reg]]"
 	     : : [reg]"r"(ptr), [data]"r"(data));
 }
  
 // read from MMIO register
-static GFXINLINE uint32_t mmio_read(uint32_t reg) {
-    uint32_t *ptr = (uint32_t*)reg;
-    uint32_t data;
+static GFXINLINE gU32 mmio_read(gU32 reg) {
+    gU32 *ptr = (gU32*)reg;
+    gU32 data;
     asm volatile("ldr %[data], [%[reg]]"
 		 : [data]"=r"(data) : [reg]"r"(ptr));
     return data;

boards/base/RaspberryPi/FreeRTOS/uart.c

@@ -46,12 +46,12 @@ enum {
  
 /*
  * delay function
- * int32_t delay: number of cycles to delay
+ * gI32 delay: number of cycles to delay
  *
  * This just loops <delay> times in a way that the compiler
  * wont optimize away.
  */
-static void delay(int32_t count) {
+static void delay(gI32 count) {
     asm volatile("__delay_%=: subs %[count], %[count], #1; bne __delay_%=\n"
 	     : : [count]"r"(count) : "cc");
 }
@@ -102,9 +102,9 @@ void uart_init() {
  
 /*
  * Transmit a byte via UART0.
- * uint8_t Byte: byte to send.
+ * gU8 Byte: byte to send.
  */
-void uart_putc(uint8_t byte) {
+void uart_putc(gU8 byte) {
     // wait for UART to become ready to transmit
     while (1) {
         if (!(mmio_read(UART0_FR) & (1 << 5))) {

boards/base/RaspberryPi/FreeRTOS/uart.h

@@ -12,9 +12,9 @@ void uart_init();
  
 /*
  * Transmit a byte via UART0.
- * uint8_t Byte: byte to send.
+ * gU8 Byte: byte to send.
  */
-void uart_putc(uint8_t byte);
+void uart_putc(gU8 byte);
  
 /*
  * print a string to the UART one character at a time

boards/base/RaspberryPi/board_framebuffer.h

@@ -26,16 +26,16 @@
 	#include "rpi_mailbox.h"
 
 	typedef struct FrameBufferDescription {
-		uint32_t	width;
-		uint32_t	height;
-		uint32_t	vWidth;
-		uint32_t	vHeight;
-		uint32_t	pitch;
-		uint32_t	bitDepth;
-		uint32_t	x;
-		uint32_t	y;
+		gU32	width;
+		gU32	height;
+		gU32	vWidth;
+		gU32	vHeight;
+		gU32	pitch;
+		gU32	bitDepth;
+		gU32	x;
+		gU32	y;
 		void *		pointer;
-		uint32_t	size;
+		gU32	size;
 		} FrameBufferDescription;
 
 	static FrameBufferDescription FrameBufferInfo __attribute__((aligned (16))) = { 1024, 768, 1024, 768, 0, 24, 0, 0, 0, 0 };
@@ -49,7 +49,7 @@
 		FrameBufferInfo.vHeight = GDISP_SCREEN_HEIGHT;
 		FrameBufferInfo.bitDepth = LLDCOLOR_BITS;
 
-		rpi_writemailbox(1, 0x40000000 + (uint32_t) &FrameBufferInfo);
+		rpi_writemailbox(1, 0x40000000 + (gU32) &FrameBufferInfo);
 
 		if (rpi_readmailbox(1) != 0)
 			gfxHalt("Could not set display parameters")
@@ -70,12 +70,12 @@
 	#endif
 
 	#if GDISP_NEED_CONTROL
-		static void board_backlight(GDisplay *g, uint8_t percent) {
+		static void board_backlight(GDisplay *g, gU8 percent) {
 			(void) g;
 			(void) percent;
 		}
 
-		static void board_contrast(GDisplay *g, uint8_t percent) {
+		static void board_contrast(GDisplay *g, gU8 percent) {
 			(void) g;
 			(void) percent;
 		}

boards/base/STM32F429i-Discovery/chibios/board_STM32LTDC.h

@@ -82,8 +82,8 @@ static void release_bus(GDisplay *g) {
 	spiUnselect(SPI_PORT);
 }
 
-static void write_index(GDisplay *g, uint8_t index) {
-	static uint8_t	sindex;
+static void write_index(GDisplay *g, gU8 index) {
+	static gU8	sindex;
 	(void) g;
 
 	palClearPad(DC_PORT, DC_PIN);
@@ -91,8 +91,8 @@ static void write_index(GDisplay *g, uint8_t index) {
 	spiSend(SPI_PORT, 1, &sindex);
 }
 
-static void write_data(GDisplay *g, uint8_t data) {
-	static uint8_t	sdata;
+static void write_data(GDisplay *g, gU8 data) {
+	static gU8	sdata;
 	(void) g;
 
 	palSetPad(DC_PORT, DC_PIN);
@@ -108,7 +108,7 @@ static void Init9341(GDisplay *g) {
 	#define REG_COMMAND		0x0100
 	#define REG_DELAY		0x0200
 
-	static const uint16_t initdata[] = {
+	static const gU16 initdata[] = {
 			REG_COMMAND | ILI9341_CMD_RESET,
 			REG_DELAY   | 5,
 			REG_COMMAND | ILI9341_CMD_DISPLAY_OFF,
@@ -152,7 +152,7 @@ static void Init9341(GDisplay *g) {
 			REG_COMMAND | ILI9341_SET_MEM
 	};
 
-	const uint16_t	*p;
+	const gU16	*p;
 
 	acquire_bus(g);
 	for(p = initdata; p < &initdata[sizeof(initdata)/sizeof(initdata[0])]; p++) {
@@ -206,7 +206,7 @@ static GFXINLINE void post_init_board(GDisplay *g) {
 	(void) g;
 }
 
-static GFXINLINE void set_backlight(GDisplay *g, uint8_t percent) {
+static GFXINLINE void set_backlight(GDisplay *g, gU8 percent) {
 	(void) g;
 	(void) percent;
 }

boards/base/STM32F429i-Discovery/chibios/gmouse_lld_STMPE811_board.h

@@ -84,8 +84,8 @@ static GFXINLINE void release_bus(GMouse* m) {
 
 }
 
-static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
-	uint8_t		txbuf[2];
+static void write_reg(GMouse* m, gU8 reg, gU8 val) {
+	gU8		txbuf[2];
 	(void)		m;
 
 	txbuf[0] = reg;
@@ -96,8 +96,8 @@ static void write_reg(GMouse* m, uint8_t reg, uint8_t val) {
 	i2cReleaseBus(&I2CD3);
 }
 
-static uint8_t read_byte(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[1];
+static gU8 read_byte(GMouse* m, gU8 reg) {
+	gU8		rxbuf[1];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -109,8 +109,8 @@ static uint8_t read_byte(GMouse* m, uint8_t reg) {
 	return rxbuf[0];
 }
 
-static uint16_t read_word(GMouse* m, uint8_t reg) {
-	uint8_t		rxbuf[2];
+static gU16 read_word(GMouse* m, gU8 reg) {
+	gU8		rxbuf[2];
 	(void)		m;
 
 	rxbuf[0] = 0;
@@ -120,7 +120,7 @@ static uint16_t read_word(GMouse* m, uint8_t reg) {
 	i2cMasterTransmitTimeout(&I2CD3, STMPE811_ADDR, &reg, 1, rxbuf, 2, MS2ST(STMPE811_TIMEOUT));
 	i2cReleaseBus(&I2CD3);
 
-	return (((uint16_t)rxbuf[0]) << 8) | rxbuf[1];
+	return (((gU16)rxbuf[0]) << 8) | rxbuf[1];
 }
 
 #endif /* _GINPUT_LLD_MOUSE_BOARD_H */

boards/base/STM32F429i-Discovery/chibios/stm32f429i_discovery_sdram.c

@@ -182,7 +182,7 @@ void SDRAM_Init(void)
 void SDRAM_InitSequence(void)
 {
   FMC_SDRAMCommandTypeDef FMC_SDRAMCommandStructure;
-  uint32_t tmpr = 0;
+  gU32 tmpr = 0;
   
 /* Step 3 --------------------------------------------------------------------*/
   /* Configure a clock configuration enable command */
@@ -240,7 +240,7 @@ void SDRAM_InitSequence(void)
   
 /* Step 7 --------------------------------------------------------------------*/
   /* Program the external memory mode register */
-  tmpr = (uint32_t)SDRAM_MODEREG_BURST_LENGTH_2          |
+  tmpr = (gU32)SDRAM_MODEREG_BURST_LENGTH_2          |
                    SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL   |
                    SDRAM_MODEREG_CAS_LATENCY_3           |
                    SDRAM_MODEREG_OPERATING_MODE_STANDARD |
@@ -279,9 +279,9 @@ void SDRAM_InitSequence(void)
   * @param  uwBufferSize: number of words to write. 
   * @retval None.
   */
-void SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBufferSize)
+void SDRAM_WriteBuffer(gU32* pBuffer, gU32 uwWriteAddress, gU32 uwBufferSize)
 {
-  __IO uint32_t write_pointer = (uint32_t)uwWriteAddress;
+  __IO gU32 write_pointer = (gU32)uwWriteAddress;
 
   /* Disable write protection */
   FMC_SDRAMWriteProtectionConfig(FMC_Bank2_SDRAM, DISABLE);
@@ -295,7 +295,7 @@ void SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBu
   for (; uwBufferSize != 0; uwBufferSize--) 
   {
     /* Transfer data to the memory */
-    *(uint32_t *) (SDRAM_BANK_ADDR + write_pointer) = *pBuffer++;
+    *(gU32 *) (SDRAM_BANK_ADDR + write_pointer) = *pBuffer++;
 
     /* Increment the address*/
     write_pointer += 4;
@@ -311,9 +311,9 @@ void SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBu
   * @param  uwBufferSize: number of words to write. 
   * @retval None.
   */
-void SDRAM_ReadBuffer(uint32_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBufferSize)
+void SDRAM_ReadBuffer(gU32* pBuffer, gU32 uwReadAddress, gU32 uwBufferSize)
 {
-  __IO uint32_t write_pointer = (uint32_t)uwReadAddress;
+  __IO gU32 write_pointer = (gU32)uwReadAddress;
   
    
   /* Wait until the SDRAM controller is ready */ 
@@ -324,7 +324,7 @@ void SDRAM_ReadBuffer(uint32_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBuff
   /* Read data */
   for(; uwBufferSize != 0x00; uwBufferSize--)
   {
-   *pBuffer++ = *(__IO uint32_t *)(SDRAM_BANK_ADDR + write_pointer );
+   *pBuffer++ = *(__IO gU32 *)(SDRAM_BANK_ADDR + write_pointer );
     
    /* Increment the address*/
     write_pointer += 4;

boards/base/STM32F429i-Discovery/chibios/stm32f429i_discovery_sdram.h

@@ -43,7 +43,7 @@
 /**
   * @brief  FMC SDRAM Bank address
   */   
-#define SDRAM_BANK_ADDR     ((uint32_t)0xD0000000)
+#define SDRAM_BANK_ADDR     ((gU32)0xD0000000)
   
 /**
   * @brief  FMC SDRAM Memory Width
@@ -72,22 +72,22 @@
 /**
   * @brief  FMC SDRAM Mode definition register defines
   */
-#define SDRAM_MODEREG_BURST_LENGTH_1             ((uint16_t)0x0000)
-#define SDRAM_MODEREG_BURST_LENGTH_2             ((uint16_t)0x0001)
-#define SDRAM_MODEREG_BURST_LENGTH_4             ((uint16_t)0x0002)
-#define SDRAM_MODEREG_BURST_LENGTH_8             ((uint16_t)0x0004)
-#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((uint16_t)0x0000)
-#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((uint16_t)0x0008)
-#define SDRAM_MODEREG_CAS_LATENCY_2              ((uint16_t)0x0020)
-#define SDRAM_MODEREG_CAS_LATENCY_3              ((uint16_t)0x0030)
-#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((uint16_t)0x0000)
-#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((uint16_t)0x0000) 
-#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((uint16_t)0x0200)      
+#define SDRAM_MODEREG_BURST_LENGTH_1             ((gU16)0x0000)
+#define SDRAM_MODEREG_BURST_LENGTH_2             ((gU16)0x0001)
+#define SDRAM_MODEREG_BURST_LENGTH_4             ((gU16)0x0002)
+#define SDRAM_MODEREG_BURST_LENGTH_8             ((gU16)0x0004)
+#define SDRAM_MODEREG_BURST_TYPE_SEQUENTIAL      ((gU16)0x0000)
+#define SDRAM_MODEREG_BURST_TYPE_INTERLEAVED     ((gU16)0x0008)
+#define SDRAM_MODEREG_CAS_LATENCY_2              ((gU16)0x0020)
+#define SDRAM_MODEREG_CAS_LATENCY_3              ((gU16)0x0030)
+#define SDRAM_MODEREG_OPERATING_MODE_STANDARD    ((gU16)0x0000)
+#define SDRAM_MODEREG_WRITEBURST_MODE_PROGRAMMED ((gU16)0x0000) 
+#define SDRAM_MODEREG_WRITEBURST_MODE_SINGLE     ((gU16)0x0200)      
 
 void  SDRAM_Init(void);
 void  SDRAM_InitSequence(void);
-void  SDRAM_WriteBuffer(uint32_t* pBuffer, uint32_t uwWriteAddress, uint32_t uwBufferSize);
-void  SDRAM_ReadBuffer(uint32_t* pBuffer, uint32_t uwReadAddress, uint32_t uwBufferSize);
+void  SDRAM_WriteBuffer(gU32* pBuffer, gU32 uwWriteAddress, gU32 uwBufferSize);
+void  SDRAM_ReadBuffer(gU32* pBuffer, gU32 uwReadAddress, gU32 uwBufferSize);
 
 #ifdef __cplusplus
 }

boards/base/STM32F429i-Discovery/chibios/stm32f4xx_fmc.c

@@ -57,24 +57,24 @@
 
 /* --------------------- FMC registers bit mask ---------------------------- */
 /* FMC BCRx Mask */
-#define BCR_MBKEN_SET              ((uint32_t)0x00000001)
-#define BCR_MBKEN_RESET            ((uint32_t)0x000FFFFE)
-#define BCR_FACCEN_SET             ((uint32_t)0x00000040)
+#define BCR_MBKEN_SET              ((gU32)0x00000001)
+#define BCR_MBKEN_RESET            ((gU32)0x000FFFFE)
+#define BCR_FACCEN_SET             ((gU32)0x00000040)
 
 /* FMC PCRx Mask */
-#define PCR_PBKEN_SET              ((uint32_t)0x00000004)
-#define PCR_PBKEN_RESET            ((uint32_t)0x000FFFFB)
-#define PCR_ECCEN_SET              ((uint32_t)0x00000040)
-#define PCR_ECCEN_RESET            ((uint32_t)0x000FFFBF)
-#define PCR_MEMORYTYPE_NAND        ((uint32_t)0x00000008)
+#define PCR_PBKEN_SET              ((gU32)0x00000004)
+#define PCR_PBKEN_RESET            ((gU32)0x000FFFFB)
+#define PCR_ECCEN_SET              ((gU32)0x00000040)
+#define PCR_ECCEN_RESET            ((gU32)0x000FFFBF)
+#define PCR_MEMORYTYPE_NAND        ((gU32)0x00000008)
 
 /* FMC SDCRx write protection Mask*/
-#define SDCR_WriteProtection_RESET ((uint32_t)0x00007DFF)
+#define SDCR_WriteProtection_RESET ((gU32)0x00007DFF)
 
 /* FMC SDCMR Mask*/
-#define SDCMR_CTB1_RESET           ((uint32_t)0x003FFFEF)
-#define SDCMR_CTB2_RESET           ((uint32_t)0x003FFFF7)
-#define SDCMR_CTB1_2_RESET         ((uint32_t)0x003FFFE7)
+#define SDCMR_CTB1_RESET           ((gU32)0x003FFFEF)
+#define SDCMR_CTB2_RESET           ((gU32)0x003FFFF7)
+#define SDCMR_CTB1_2_RESET         ((gU32)0x003FFFE7)
 
 /* Private macro -------------------------------------------------------------*/
 /* Private variables ---------------------------------------------------------*/
@@ -134,7 +134,7 @@
   *            @arg FMC_Bank1_NORSRAM4: FMC Bank1 NOR/SRAM4
   * @retval None
   */
-void FMC_NORSRAMDeInit(uint32_t FMC_Bank)
+void FMC_NORSRAMDeInit(gU32 FMC_Bank)
 {
   /* Check the parameter */
   assert_param(IS_FMC_NORSRAM_BANK(FMC_Bank));
@@ -163,7 +163,7 @@ void FMC_NORSRAMDeInit(uint32_t FMC_Bank)
   */
 void FMC_NORSRAMInit(FMC_NORSRAMInitTypeDef* FMC_NORSRAMInitStruct)
 {
-  uint32_t tmpr = 0;
+  gU32 tmpr = 0;
 
   /* Check the parameters */
   assert_param(IS_FMC_NORSRAM_BANK(FMC_NORSRAMInitStruct->FMC_Bank));
@@ -190,7 +190,7 @@ void FMC_NORSRAMInit(FMC_NORSRAMInitTypeDef* FMC_NORSRAMInitStruct)
 
   /* NOR/SRAM Bank control register configuration */
   FMC_Bank1->BTCR[FMC_NORSRAMInitStruct->FMC_Bank] =
-            (uint32_t)FMC_NORSRAMInitStruct->FMC_DataAddressMux |
+            (gU32)FMC_NORSRAMInitStruct->FMC_DataAddressMux |
             FMC_NORSRAMInitStruct->FMC_MemoryType |
             FMC_NORSRAMInitStruct->FMC_MemoryDataWidth |
             FMC_NORSRAMInitStruct->FMC_BurstAccessMode |
@@ -207,22 +207,22 @@ void FMC_NORSRAMInit(FMC_NORSRAMInitTypeDef* FMC_NORSRAMInitStruct)
 
   if(FMC_NORSRAMInitStruct->FMC_MemoryType == FMC_MemoryType_NOR)
   {
-    FMC_Bank1->BTCR[FMC_NORSRAMInitStruct->FMC_Bank] |= (uint32_t)BCR_FACCEN_SET;
+    FMC_Bank1->BTCR[FMC_NORSRAMInitStruct->FMC_Bank] |= (gU32)BCR_FACCEN_SET;
   }
 
   /* Configure Continuous clock feature when bank2..4 is used */
   if((FMC_NORSRAMInitStruct->FMC_ContinousClock == FMC_CClock_SyncAsync) && (FMC_NORSRAMInitStruct->FMC_Bank != FMC_Bank1_NORSRAM1))
   {
-    tmpr = (uint32_t)((FMC_Bank1->BTCR[FMC_Bank1_NORSRAM1+1]) & ~(((uint32_t)0x0F) << 20));
+    tmpr = (gU32)((FMC_Bank1->BTCR[FMC_Bank1_NORSRAM1+1]) & ~(((gU32)0x0F) << 20));
 
     FMC_Bank1->BTCR[FMC_Bank1_NORSRAM1]  |= FMC_NORSRAMInitStruct->FMC_ContinousClock;
     FMC_Bank1->BTCR[FMC_Bank1_NORSRAM1]  |= FMC_BurstAccessMode_Enable;
-    FMC_Bank1->BTCR[FMC_Bank1_NORSRAM1+1] = (uint32_t)(tmpr | (((FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_CLKDivision)-1) << 20));
+    FMC_Bank1->BTCR[FMC_Bank1_NORSRAM1+1] = (gU32)(tmpr | (((FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_CLKDivision)-1) << 20));
   }
 
   /* NOR/SRAM Bank timing register configuration */
   FMC_Bank1->BTCR[FMC_NORSRAMInitStruct->FMC_Bank+1] =
-            (uint32_t)FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_AddressSetupTime |
+            (gU32)FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_AddressSetupTime |
             (FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_AddressHoldTime << 4) |
             (FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_DataSetupTime << 8) |
             (FMC_NORSRAMInitStruct->FMC_ReadWriteTimingStruct->FMC_BusTurnAroundDuration << 16) |
@@ -241,7 +241,7 @@ void FMC_NORSRAMInit(FMC_NORSRAMInitTypeDef* FMC_NORSRAMInitStruct)
     assert_param(IS_FMC_ACCESS_MODE(FMC_NORSRAMInitStruct->FMC_WriteTimingStruct->FMC_AccessMode));
 
     FMC_Bank1E->BWTR[FMC_NORSRAMInitStruct->FMC_Bank] =
-               (uint32_t)FMC_NORSRAMInitStruct->FMC_WriteTimingStruct->FMC_AddressSetupTime |
+               (gU32)FMC_NORSRAMInitStruct->FMC_WriteTimingStruct->FMC_AddressSetupTime |
                (FMC_NORSRAMInitStruct->FMC_WriteTimingStruct->FMC_AddressHoldTime << 4 )|
                (FMC_NORSRAMInitStruct->FMC_WriteTimingStruct->FMC_DataSetupTime << 8) |
                ((FMC_NORSRAMInitStruct->FMC_WriteTimingStruct->FMC_CLKDivision) << 20) |
@@ -306,7 +306,7 @@ void FMC_NORSRAMStructInit(FMC_NORSRAMInitTypeDef* FMC_NORSRAMInitStruct)
   * @param  NewState: new state of the FMC_Bank. This parameter can be: ENABLE or DISABLE.
   * @retval None
   */
-void FMC_NORSRAMCmd(uint32_t FMC_Bank, FunctionalState NewState)
+void FMC_NORSRAMCmd(gU32 FMC_Bank, FunctionalState NewState)
 {
   assert_param(IS_FMC_NORSRAM_BANK(FMC_Bank));
   assert_param(IS_FUNCTIONAL_STATE(NewState));
@@ -379,7 +379,7 @@ void FMC_NORSRAMCmd(uint32_t FMC_Bank, FunctionalState NewState)
   *            @arg FMC_Bank3_NAND: FMC Bank3 NAND
   * @retval None
   */
-void FMC_NANDDeInit(uint32_t FMC_Bank)
+void FMC_NANDDeInit(gU32 FMC_Bank)
 {
   /* Check the parameter */
   assert_param(IS_FMC_NAND_BANK(FMC_Bank));
@@ -412,7 +412,7 @@ void FMC_NANDDeInit(uint32_t FMC_Bank)
   */
 void FMC_NANDInit(FMC_NANDInitTypeDef* FMC_NANDInitStruct)
 {
-  uint32_t tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000;
+  gU32 tmppcr = 0x00000000, tmppmem = 0x00000000, tmppatt = 0x00000000;
 
   /* Check the parameters */
   assert_param(IS_FMC_NAND_BANK(FMC_NANDInitStruct->FMC_Bank));
@@ -432,7 +432,7 @@ void FMC_NANDInit(FMC_NANDInitTypeDef* FMC_NANDInitStruct)
   assert_param(IS_FMC_HIZ_TIME(FMC_NANDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_HiZSetupTime));
 
   /* Set the tmppcr value according to FMC_NANDInitStruct parameters */
-  tmppcr = (uint32_t)FMC_NANDInitStruct->FMC_Waitfeature |
+  tmppcr = (gU32)FMC_NANDInitStruct->FMC_Waitfeature |
             PCR_MEMORYTYPE_NAND |
             FMC_NANDInitStruct->FMC_MemoryDataWidth |
             FMC_NANDInitStruct->FMC_ECC |
@@ -441,13 +441,13 @@ void FMC_NANDInit(FMC_NANDInitTypeDef* FMC_NANDInitStruct)
             (FMC_NANDInitStruct->FMC_TARSetupTime << 13);
 
   /* Set tmppmem value according to FMC_CommonSpaceTimingStructure parameters */
-  tmppmem = (uint32_t)FMC_NANDInitStruct->FMC_CommonSpaceTimingStruct->FMC_SetupTime |
+  tmppmem = (gU32)FMC_NANDInitStruct->FMC_CommonSpaceTimingStruct->FMC_SetupTime |
             (FMC_NANDInitStruct->FMC_CommonSpaceTimingStruct->FMC_WaitSetupTime << 8) |
             (FMC_NANDInitStruct->FMC_CommonSpaceTimingStruct->FMC_HoldSetupTime << 16)|
             (FMC_NANDInitStruct->FMC_CommonSpaceTimingStruct->FMC_HiZSetupTime << 24);
 
   /* Set tmppatt value according to FMC_AttributeSpaceTimingStructure parameters */
-  tmppatt = (uint32_t)FMC_NANDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_SetupTime |
+  tmppatt = (gU32)FMC_NANDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_SetupTime |
             (FMC_NANDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_WaitSetupTime << 8) |
             (FMC_NANDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_HoldSetupTime << 16)|
             (FMC_NANDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_HiZSetupTime << 24);
@@ -504,7 +504,7 @@ void FMC_NANDStructInit(FMC_NANDInitTypeDef* FMC_NANDInitStruct)
   * @param  NewState: new state of the FMC_Bank. This parameter can be: ENABLE or DISABLE.
   * @retval None
   */
-void FMC_NANDCmd(uint32_t FMC_Bank, FunctionalState NewState)
+void FMC_NANDCmd(gU32 FMC_Bank, FunctionalState NewState)
 {
   assert_param(IS_FMC_NAND_BANK(FMC_Bank));
   assert_param(IS_FUNCTIONAL_STATE(NewState));
@@ -544,7 +544,7 @@ void FMC_NANDCmd(uint32_t FMC_Bank, FunctionalState NewState)
   *          This parameter can be: ENABLE or DISABLE.
   * @retval None
   */
-void FMC_NANDECCCmd(uint32_t FMC_Bank, FunctionalState NewState)
+void FMC_NANDECCCmd(gU32 FMC_Bank, FunctionalState NewState)
 {
   assert_param(IS_FMC_NAND_BANK(FMC_Bank));
   assert_param(IS_FUNCTIONAL_STATE(NewState));
@@ -583,9 +583,9 @@ void FMC_NANDECCCmd(uint32_t FMC_Bank, FunctionalState NewState)
   *            @arg FMC_Bank3_NAND: FMC Bank3 NAND
   * @retval The Error Correction Code (ECC) value.
   */
-uint32_t FMC_GetECC(uint32_t FMC_Bank)
+gU32 FMC_GetECC(gU32 FMC_Bank)
 {
-  uint32_t eccval = 0x00000000;
+  gU32 eccval = 0x00000000;
 
   if(FMC_Bank == FMC_Bank2_NAND)
   {
@@ -686,25 +686,25 @@ void FMC_PCCARDInit(FMC_PCCARDInitTypeDef* FMC_PCCARDInitStruct)
   assert_param(IS_FMC_HIZ_TIME(FMC_PCCARDInitStruct->FMC_IOSpaceTimingStruct->FMC_HiZSetupTime));
 
   /* Set the PCR4 register value according to FMC_PCCARDInitStruct parameters */
-  FMC_Bank4->PCR4 = (uint32_t)FMC_PCCARDInitStruct->FMC_Waitfeature |
+  FMC_Bank4->PCR4 = (gU32)FMC_PCCARDInitStruct->FMC_Waitfeature |
                      FMC_NAND_MemoryDataWidth_16b |
                      (FMC_PCCARDInitStruct->FMC_TCLRSetupTime << 9) |
                      (FMC_PCCARDInitStruct->FMC_TARSetupTime << 13);
 
   /* Set PMEM4 register value according to FMC_CommonSpaceTimingStructure parameters */
-  FMC_Bank4->PMEM4 = (uint32_t)FMC_PCCARDInitStruct->FMC_CommonSpaceTimingStruct->FMC_SetupTime |
+  FMC_Bank4->PMEM4 = (gU32)FMC_PCCARDInitStruct->FMC_CommonSpaceTimingStruct->FMC_SetupTime |
                       (FMC_PCCARDInitStruct->FMC_CommonSpaceTimingStruct->FMC_WaitSetupTime << 8) |
                       (FMC_PCCARDInitStruct->FMC_CommonSpaceTimingStruct->FMC_HoldSetupTime << 16)|
                       (FMC_PCCARDInitStruct->FMC_CommonSpaceTimingStruct->FMC_HiZSetupTime << 24);
 
   /* Set PATT4 register value according to FMC_AttributeSpaceTimingStructure parameters */
-  FMC_Bank4->PATT4 = (uint32_t)FMC_PCCARDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_SetupTime |
+  FMC_Bank4->PATT4 = (gU32)FMC_PCCARDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_SetupTime |
                       (FMC_PCCARDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_WaitSetupTime << 8) |
                       (FMC_PCCARDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_HoldSetupTime << 16)|
                       (FMC_PCCARDInitStruct->FMC_AttributeSpaceTimingStruct->FMC_HiZSetupTime << 24);
 
   /* Set PIO4 register value according to FMC_IOSpaceTimingStructure parameters */
-  FMC_Bank4->PIO4 = (uint32_t)FMC_PCCARDInitStruct->FMC_IOSpaceTimingStruct->FMC_SetupTime |
+  FMC_Bank4->PIO4 = (gU32)FMC_PCCARDInitStruct->FMC_IOSpaceTimingStruct->FMC_SetupTime |
                      (FMC_PCCARDInitStruct->FMC_IOSpaceTimingStruct->FMC_WaitSetupTime << 8) |
                      (FMC_PCCARDInitStruct->FMC_IOSpaceTimingStruct->FMC_HoldSetupTime << 16)|
                      (FMC_PCCARDInitStruct->FMC_IOSpaceTimingStruct->FMC_HiZSetupTime << 24);
@@ -814,7 +814,7 @@ void FMC_PCCARDCmd(FunctionalState NewState)
   *            @arg FMC_Bank2_SDRAM: FMC Bank2 SDRAM
   * @retval None
   */
-void FMC_SDRAMDeInit(uint32_t FMC_Bank)
+void FMC_SDRAMDeInit(gU32 FMC_Bank)
 {
   /* Check the parameter */
   assert_param(IS_FMC_SDRAM_BANK(FMC_Bank));
@@ -837,10 +837,10 @@ void FMC_SDRAMDeInit(uint32_t FMC_Bank)
 void FMC_SDRAMInit(FMC_SDRAMInitTypeDef* FMC_SDRAMInitStruct)
 {
   /* temporary registers */
-  uint32_t tmpr1 = 0;
-  uint32_t tmpr2 = 0;
-  uint32_t tmpr3 = 0;
-  uint32_t tmpr4 = 0;
+  gU32 tmpr1 = 0;
+  gU32 tmpr2 = 0;
+  gU32 tmpr3 = 0;
+  gU32 tmpr4 = 0;
 
   /* Check the parameters */
 
@@ -866,7 +866,7 @@ void FMC_SDRAMInit(FMC_SDRAMInitTypeDef* FMC_SDRAMInitStruct)
   assert_param(IS_FMC_RCD_DELAY(FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_RCDDelay));
 
   /* SDRAM bank control register configuration */
-  tmpr1 =   (uint32_t)FMC_SDRAMInitStruct->FMC_ColumnBitsNumber |
+  tmpr1 =   (gU32)FMC_SDRAMInitStruct->FMC_ColumnBitsNumber |
              FMC_SDRAMInitStruct->FMC_RowBitsNumber |
              FMC_SDRAMInitStruct->FMC_SDMemoryDataWidth |
              FMC_SDRAMInitStruct->FMC_InternalBankNumber |
@@ -882,7 +882,7 @@ void FMC_SDRAMInit(FMC_SDRAMInitTypeDef* FMC_SDRAMInitStruct)
   }
   else   /* SDCR2 "don't care" bits configuration */
   {
-    tmpr3 = (uint32_t)FMC_SDRAMInitStruct->FMC_SDClockPeriod |
+    tmpr3 = (gU32)FMC_SDRAMInitStruct->FMC_SDClockPeriod |
              FMC_SDRAMInitStruct->FMC_ReadBurst |
              FMC_SDRAMInitStruct->FMC_ReadPipeDelay;
 
@@ -892,7 +892,7 @@ void FMC_SDRAMInit(FMC_SDRAMInitTypeDef* FMC_SDRAMInitStruct)
   /* SDRAM bank timing register configuration */
   if(FMC_SDRAMInitStruct->FMC_Bank == FMC_Bank1_SDRAM )
   {
-    tmpr2 =   (uint32_t)((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_LoadToActiveDelay)-1) |
+    tmpr2 =   (gU32)((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_LoadToActiveDelay)-1) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_ExitSelfRefreshDelay)-1) << 4) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_SelfRefreshTime)-1) << 8) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_RowCycleDelay)-1) << 12) |
@@ -904,12 +904,12 @@ void FMC_SDRAMInit(FMC_SDRAMInitTypeDef* FMC_SDRAMInitStruct)
   }
   else   /* SDTR "don't care bits configuration */
   {
-    tmpr2 =   (uint32_t)((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_LoadToActiveDelay)-1) |
+    tmpr2 =   (gU32)((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_LoadToActiveDelay)-1) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_ExitSelfRefreshDelay)-1) << 4) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_SelfRefreshTime)-1) << 8) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_WriteRecoveryTime)-1) << 16);
 
-    tmpr4 =   (uint32_t)(((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_RowCycleDelay)-1) << 12) |
+    tmpr4 =   (gU32)(((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_RowCycleDelay)-1) << 12) |
             (((FMC_SDRAMInitStruct->FMC_SDRAMTimingStruct->FMC_RPDelay)-1) << 20);
 
             FMC_Bank5_6->SDTR[FMC_Bank1_SDRAM] = tmpr4;
@@ -956,7 +956,7 @@ void FMC_SDRAMStructInit(FMC_SDRAMInitTypeDef* FMC_SDRAMInitStruct)
   */
 void FMC_SDRAMCmdConfig(FMC_SDRAMCommandTypeDef* FMC_SDRAMCommandStruct)
 {
-  uint32_t tmpr = 0x0;
+  gU32 tmpr = 0x0;
 
   /* check parameters */
   assert_param(IS_FMC_COMMAND_MODE(FMC_SDRAMCommandStruct->FMC_CommandMode));
@@ -964,7 +964,7 @@ void FMC_SDRAMCmdConfig(FMC_SDRAMCommandTypeDef* FMC_SDRAMCommandStruct)
   assert_param(IS_FMC_AUTOREFRESH_NUMBER(FMC_SDRAMCommandStruct->FMC_AutoRefreshNumber));
   assert_param(IS_FMC_MODE_REGISTER(FMC_SDRAMCommandStruct->FMC_ModeRegisterDefinition));
 
-  tmpr =   (uint32_t)(FMC_SDRAMCommandStruct->FMC_CommandMode |
+  tmpr =   (gU32)(FMC_SDRAMCommandStruct->FMC_CommandMode |
                       FMC_SDRAMCommandStruct->FMC_CommandTarget |
                      (((FMC_SDRAMCommandStruct->FMC_AutoRefreshNumber)-1)<<5) |
                      ((FMC_SDRAMCommandStruct->FMC_ModeRegisterDefinition)<<9));
@@ -980,9 +980,9 @@ void FMC_SDRAMCmdConfig(FMC_SDRAMCommandTypeDef* FMC_SDRAMCommandStruct)
   *                     FMC_Bank1_SDRAM or FMC_Bank2_SDRAM.
   * @retval The FMC SDRAM bank mode status
   */
-uint32_t FMC_GetModeStatus(uint32_t SDRAM_Bank)
+gU32 FMC_GetModeStatus(gU32 SDRAM_Bank)
 {
-  uint32_t tmpreg = 0;
+  gU32 tmpreg = 0;
 
   /* Check the parameter */
   assert_param(IS_FMC_SDRAM_BANK(SDRAM_Bank));
@@ -990,11 +990,11 @@ uint32_t FMC_GetModeStatus(uint32_t SDRAM_Bank)
   /* Get the busy flag status */
   if(SDRAM_Bank == FMC_Bank1_SDRAM)
   {
-    tmpreg = (uint32_t)(FMC_Bank5_6->SDSR & FMC_SDSR_MODES1);
+    tmpreg = (gU32)(FMC_Bank5_6->SDSR & FMC_SDSR_MODES1);
   }
   else
   {
-    tmpreg = ((uint32_t)(FMC_Bank5_6->SDSR & FMC_SDSR_MODES2) >> 2);
+    tmpreg = ((gU32)(FMC_Bank5_6->SDSR & FMC_SDSR_MODES2) >> 2);
   }
 
   /* Return the mode status */
@@ -1006,7 +1006,7 @@ uint32_t FMC_GetModeStatus(uint32_t SDRAM_Bank)
   * @param  FMC_Count: specifies the Refresh timer count.
   * @retval None
   */
-void FMC_SetRefreshCount(uint32_t FMC_Count)
+void FMC_SetRefreshCount(gU32 FMC_Count)
 {
   /* check the parameters */
   assert_param(IS_FMC_REFRESH_COUNT(FMC_Count));
@@ -1020,7 +1020,7 @@ void FMC_SetRefreshCount(uint32_t FMC_Count)
   * @param  FMC_Number: specifies the auto Refresh number.
   * @retval None
   */
-void FMC_SetAutoRefresh_Number(uint32_t FMC_Number)
+void FMC_SetAutoRefresh_Number(gU32 FMC_Number)
 {
   /* check the parameters */
   assert_param(IS_FMC_AUTOREFRESH_NUMBER(FMC_Number));
@@ -1036,7 +1036,7 @@ void FMC_SetAutoRefresh_Number(uint32_t FMC_Number)
   *          This parameter can be: ENABLE or DISABLE.
   * @retval None
   */
-void FMC_SDRAMWriteProtectionConfig(uint32_t SDRAM_Bank, FunctionalState NewState)
+void FMC_SDRAMWriteProtectionConfig(gU32 SDRAM_Bank, FunctionalState NewState)
 {
   /* Check the parameter */
   assert_param(IS_FUNCTIONAL_STATE(NewState));
@@ -1088,7 +1088,7 @@ void FMC_SDRAMWriteProtectionConfig(uint32_t SDRAM_Bank, FunctionalState NewStat
   *          This parameter can be: ENABLE or DISABLE.
   * @retval None
   */
-void FMC_ITConfig(uint32_t FMC_Bank, uint32_t FMC_IT, FunctionalState NewState)
+void FMC_ITConfig(gU32 FMC_Bank, gU32 FMC_IT, FunctionalState NewState)
 {
   assert_param(IS_FMC_IT_BANK(FMC_Bank));
   assert_param(IS_FMC_IT(FMC_IT));
@@ -1124,23 +1124,23 @@ void FMC_ITConfig(uint32_t FMC_Bank, uint32_t FMC_IT, FunctionalState NewState)
     if(FMC_Bank == FMC_Bank2_NAND)
     {
 
-      FMC_Bank2->SR2 &= (uint32_t)~FMC_IT;
+      FMC_Bank2->SR2 &= (gU32)~FMC_IT;
     }
     /* Disable the selected FMC_Bank3 interrupts */
     else if (FMC_Bank == FMC_Bank3_NAND)
     {
-      FMC_Bank3->SR3 &= (uint32_t)~FMC_IT;
+      FMC_Bank3->SR3 &= (gU32)~FMC_IT;
     }
     /* Disable the selected FMC_Bank4 interrupts */
     else if(FMC_Bank == FMC_Bank4_PCCARD)
     {
-      FMC_Bank4->SR4 &= (uint32_t)~FMC_IT;
+      FMC_Bank4->SR4 &= (gU32)~FMC_IT;
     }
     /* Disable the selected FMC_Bank5_6 interrupt */
     else
     {
       /* Disables the interrupt if the refresh error flag is not set */
-      FMC_Bank5_6->SDRTR &= (uint32_t)~FMC_IT;
+      FMC_Bank5_6->SDRTR &= (gU32)~FMC_IT;
     }
   }
 }
@@ -1165,10 +1165,10 @@ void FMC_ITConfig(uint32_t FMC_Bank, uint32_t FMC_IT, FunctionalState NewState)
   *            @arg FMC_FLAG_Busy: Busy status Flag.
   * @retval The new state of FMC_FLAG (SET or RESET).
   */
-FlagStatus FMC_GetFlagStatus(uint32_t FMC_Bank, uint32_t FMC_FLAG)
+FlagStatus FMC_GetFlagStatus(gU32 FMC_Bank, gU32 FMC_FLAG)
 {
   FlagStatus bitstatus = RESET;
-  uint32_t tmpsr = 0x00000000;
+  gU32 tmpsr = 0x00000000;
 
   /* Check the parameters */
   assert_param(IS_FMC_GETFLAG_BANK(FMC_Bank));
@@ -1221,7 +1221,7 @@ FlagStatus FMC_GetFlagStatus(uint32_t FMC_Bank, uint32_t FMC_FLAG)
   *            @arg FMC_FLAG_Refresh: Refresh error Flag.
   * @retval None
   */
-void FMC_ClearFlag(uint32_t FMC_Bank, uint32_t FMC_FLAG)
+void FMC_ClearFlag(gU32 FMC_Bank, gU32 FMC_FLAG)
 {
  /* Check the parameters */
   assert_param(IS_FMC_GETFLAG_BANK(FMC_Bank));
@@ -1264,13 +1264,13 @@ void FMC_ClearFlag(uint32_t FMC_Bank, uint32_t FMC_FLAG)
   *            @arg FMC_IT_Refresh: Refresh error detection interrupt.
   * @retval The new state of FMC_IT (SET or RESET).
   */
-ITStatus FMC_GetITStatus(uint32_t FMC_Bank, uint32_t FMC_IT)
+ITStatus FMC_GetITStatus(gU32 FMC_Bank, gU32 FMC_IT)
 {
   ITStatus bitstatus = RESET;
-  uint32_t tmpsr = 0x0;
-  uint32_t tmpsr2 = 0x0;
-  uint32_t itstatus = 0x0;
-  uint32_t itenable = 0x0;
+  gU32 tmpsr = 0x0;
+  gU32 tmpsr2 = 0x0;
+  gU32 itstatus = 0x0;
+  gU32 itenable = 0x0;
 
   /* Check the parameters */
   assert_param(IS_FMC_IT_BANK(FMC_Bank));
@@ -1308,7 +1308,7 @@ ITStatus FMC_GetITStatus(uint32_t FMC_Bank, uint32_t FMC_IT)
     itstatus = tmpsr & (FMC_IT >> 3);
   }
 
-  if ((itstatus != (uint32_t)RESET)  && (itenable != (uint32_t)RESET))
+  if ((itstatus != (gU32)RESET)  && (itenable != (gU32)RESET))
   {
     bitstatus = SET;
   }
@@ -1336,7 +1336,7 @@ ITStatus FMC_GetITStatus(uint32_t FMC_Bank, uint32_t FMC_IT)
   *            @arg FMC_IT_Refresh: Refresh error detection interrupt.
   * @retval None
   */
-void FMC_ClearITPendingBit(uint32_t FMC_Bank, uint32_t FMC_IT)
+void FMC_ClearITPendingBit(gU32 FMC_Bank, gU32 FMC_IT)
 {
   /* Check the parameters */
   assert_param(IS_FMC_IT_BANK(FMC_Bank));